An embodiment of the present invention relates generally to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device by monitoring trench depth during processing.
Since the invention of superjunction devices by Dr. Xingbi Chen, as disclosed in U.S. Pat. No. 5,216,275, the contents of which are incorporated by reference herein, there have been many attempts to expand and improve on the superjunction effect of his invention. U.S. Pat. Nos. 6,410,958, 6,300,171 and 6,307,246 are examples of such efforts and are incorporated by reference herein.
Trench-type superjunction devices are expected to replace multi-epi superjunction devices because of the potential lower processing cost. FIG. 1A illustrates an enlarged partial cross-sectional view of a wafer 10 having a first main surface 2 and a second main surface 4. The wafer 10 includes a semiconductor substrate region 3 with an upper surface 6. A semiconductor material layer 5 is disposed adjacent the upper surface 6 of the substrate region 3. A layer of dielectric material or oxide 14 is disposed on the first main surface 2. A trench 12 is formed in the semiconductor material layer 5 extending to a depth D from the first main surface 2 toward the substrate region 3, exposing a portion of the upper surface 6.
In superjunction metal-oxide semiconductor field-effect-transistor (MOSFET) manufacturing, typically the trenches 12 are etched, sidewalls of the trenches 12 are doped to form columns of n or p type (not shown), and the trenches 12 are refilled. The depth of the trenches 12 is critical to performance and reliability of the end devices derived from the wafer 10. The depth D preferably penetrates the semiconductor material layer 5 to expose the upper surface 6 of the substrate region 3. For example, FIG. 1B illustrates a wafer 10 wherein a trench 12s has been formed in the semiconductor material layer 5, but the depth Ds is too shallow and does not reach the upper surface 6 of the substrate region 3. Conversely, FIG. 1C illustrates a wafer 10 wherein a trench 12d has been formed in the semiconductor material layer 5, but the depth Dd is too deep and penetrates the upper surface 6, extending partially into the substrate region 3. In either of the examples of FIGS. 1B and 1C, sidewall doping will be affected, thereby resulting in decreased performance and reliability.
The depth of relatively larger trenches 12 may be measured using non-contact metrology. For example, the depth of a trench 12 having a width of 10 micrometers (μm) may be assessed using an optical profiler. However, as the trenches 12 become narrower, at a width of 4 μm for example, the depth can only be measured via destructive analysis techniques, such as the use of a scanning electron microscope (SEM). By destroying a portion of the wafer 10, the yield is thereby decreased.
In addition to superjunction devices, the development of microelectromechanical systems (MEMS) technology has provided the ability to combine microelectronic circuits and mechanical parts, such as cantilevers, membranes, holes, and the like, onto a single chip. MEMS chips may be developed to provide, for example, inertia sensors (e.g., for use in an accelerometer), radio frequency (RF) switches, and pressure sensors, and may also be used in optics applications, such as for digital light processing (DLP) televisions. The depth of trenches formed on MEMS chips is therefore also critical for proper functionality.
It is desirable to provide a method of manufacturing trench-type superjunction devices and MEMS whereby the trench depth may be accurately monitored without unnecessary destructive measurement analysis, thereby increasing wafer yield.